Heterogeneous Computing with CMOS and Stochastic Nanomagnets for Probabilistic Inference and Learning

Heterogeneous Computing with CMOS and Stochastic Nanomagnets for Probabilistic Inference and Learning. Expanding Moore’s law by augmenting complementary-metal-oxide-semiconductor (CMOS) transistors with emerging nanotechnologies (X) has become increasingly significant. One vital class of difficulties involves sampling-based Monte Carlo algorithms used in probabilistic machine learning, optimization, and quantum simulation. To know more about heterogeneous computing with CMOS and stochastic nanomagnets for probabilistic inference and learning, read the complete article.

Heterogeneous Computing with CMOS and Stochastic Nanomagnets for Probabilistic Inference and Learning

With the decreasing pace of Moore’s law, there has been a rapidly increasing interest in domain-specific hardware and architectures to solve emerging computational challenges and energy efficiency, especially borne out of machine learning and AI applications. One intriguing strategy is the co-integration of traditional complementary metal-oxide semiconductor (CMOS) technology with rising nanotechnologies (X), resulting in CMOS + X architectures. The main objective of this approach is to augment current CMOS technology with novel functionalities by allowing the development of physics-inspired hardware systems that achieve energy efficiency, massive parallelism, and asynchronous dynamics, and apply them to a huge range of challenges across different domains.

Monte Carlo methods have been named one of the top ten algorithms of the 20th century and are one of the most influential approaches in computing to solve computationally hard problems in a wide range of applications, from probabilistic machine learning and optimization to quantum simulation. Probabilistic computing with p-bits has emerged as a powerful platform for executing these Monte Carlo methods in huge parallel and energy-efficient architectures. P-bits have been shown to be applicable to a large domain of computational challenges, from combinatorial optimization to probabilistic machine learning and quantum simulation.

How is a heterogeneous p-computer constructed?

In this, we use sMTJ-based p-bits to generate asynchronous and truly random clock sources to drive digital p-bits in the FPGA. The conductance of the sMTJ depends on the relative angle Θ between the free and the fixed layers, GMTJ ∝ [1+P2 cos(θ)], where P is the interfacial spin polarization. When the free layer is made out of a low barrier nanomagnet, θ becomes a random variable in the presence of thermal noise, causing conductance fluctuations between the parallel (P) and the antiparallel (AP).

The five sMTJs used in the research are created with a diameter of 50 nm and have a relaxation time of about 1-20 ms, with energy barriers of ≈14–17 kBT, imagining an attempt time of 1 ns. To turn these conductance fluctuations into voltages, now create a new p-bit circuit. This circuit compares the voltages of two branches that are fed into an operational amplifier and are controlled by two transistors. The primary difference of this circuit compared to the prior transistor/1MTJ design is in its ability to provide a larger stochastic window to tune the p-bit with more variation tolerance.

The asynchronous clocks received from p-bits with 50/50 fluctuations are fed to the FPGA. Create a digital probabilistic computer with a p-bit that includes a digital comparator, a pseudorandom number generator (PRNG), and a lookup table (LUT) for the hyperbolic tangent function inside the FPGA.

The important link between analog p-bits and the digital FPGA is developed through the clock of the PRNG used in the FPGA, where a multitude of digital p-bits can be asynchronously driven by analog p-bits. The quality of the chosen PRNG depends on the injection of additional entropy through the clocks, which has a thoughtful influence on inference and learning tasks. The potential for modifying low-quality PRNGs using compact and scalable nanotechnologies, such as sMTJs, which can be integrated as a BEOL (back-end-of-line) process on top of the CMOS logic, holds important promise for future COMS + sMTJ architectures.

Results of the Construction of Heterogeneous p-computer

In the p-bit formulation, the probabilistic inference is generating samples from a particular distribution, which is the Gibbs-Boltzmann distribution for a given network. This is a computationally hard problem and is at the heart of many important applications involving Bayesian inference, training probabilistic models in machine learning, statistical physics and many others. Due to the broad applicability of probabilistic inference, improving key features of merit, such as probabilistic flips per second and energy-delay product for this task, is extremely important.

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